Product Introduction

The PMS163 is an ADC-Type, fully static, OTP-based 8 bit CMOS Touch-Key MCU; it employs RISC architecture and most the instructions are executed in one cycle except that few instructions are two cycles that handle indirect memory access.

A maximum 13-ch touch keys controller is built inside PMS163. Besides, PMS163 also includes 2.5KW OTP program memory, 160 bytes data SRAM, one hardware 16-bit timer, two are 8-bit timers with PWM generation, and three hardware 11-bit timers with PWM generation are also included.

   Product Features

1.1. Special Features

 Not supposed to use in AC RC step-down powered or high EFT requirement applications.

PADAUK assumes no liability if such kind of applications can not pass the safety regulation tests.

 Operating temperature range: -40°C ~ 85°C

1.2. System Features

 2.5KW OTP program memory

 160 Bytes data RAM

 Maximum 13 IO pins can be selected as TOUCH PAD individually

 One hardware 16-bit timer

 Two hardware 8-bit timer with PWM generation

 Three hardware 11-bit PWM generators (PWMG0, PWMG1 & PWMG2)

 One hardware comparator

 Provide 1T 8x8 hardware multiplier

 14 IO pins with optional pull-high/pull-low resistor

 Every IO pin can be configured to enable wake-up function

 PA6/PA7/PB7 support large sink current: 80mA

 Bandgap circuit to provide 1.2V Bandgap voltage

 Up to 12-channel 12-bit resolution ADC with one channel comes from internal Bandgap reference voltage or 0.25*VDD

 Provide ADC reference high voltage: external input, internal VDD, Bandgap(1.20V), 4V, 3V, 2V

 Clock sources: internal high RC oscillator(IHRC) and internal low RC oscillator(ILRC)

 For every wake-up enabled IO, two optional wake-up speed are supported: normal and fast

 Sixteen Levels of LVR reset: 4.5V, 4.0V, 3.75V, 3.5V, 3.3V, 3.15V, 3.0V, 2.7V, 2.5V, 2.4V, 2.3V, 2.2V, 2.1V, 2.0V, 1.9V, 1.8V

 Four selectable external interrupt pin

 Internal LDO for touch noise immunity

 One low-power clock (NILRC) wake-up stopsys regularly

1.3. CPU Features

 Operating modes: One processing unit mode

 88 powerful instructions

 Most instructions are 1T execution cycle

 Programmable stack pointer to provide adjustable stack level (Using 2 bytes SRAM for one stack level)

 Direct and indirect addressing modes for data and instructions

 All data memories are available for use as an index pointer

 Separated IO and memory space

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