Product Introduction

The PMS160 is a fully static, OTP-based 8-bit CMOS MCU; it employs RISC architecture and most the instructions are executed in one cycle except that few instructions are two cycles that handle indirect memory access.

A maximum 6 keys touch controller is built inside PMS160. Besides, PMS160 also includes 1.5KW OTP program memory, 96 bytes data SRAM, one hardware 16-bit timer, one hardware 8-bit Timer3, one hardware 8-bit Timer2 and one new triple 11-bit timer with SuLED PWM generation(LPWMG0/1/2).

   Product Features

1.1. Special Features

 Not supposed to use in AC RC step-down powered or high EFT requirement applications.

PADAUK assumes no liability if such kind of applications can not pass the safety regulation tests.

 Operating temperature range: -20°C ~ 70°C

1.2. System Features

 1.5KW OTP program memory

 96 Bytes data RAM

 Maximum 6 IO pins can be selected as TOUCH PAD individually

 One hardware 16-bit timer

 Two hardware 8-bit timers with PWM generation (Timer2/Timer3), Timer2/Timer3 also configured with NILRC oscillator. Its frequency is slower than ILRC and suitable for a more power-saving wake-up clock.

 One set triple 11bit SuLED (Super LED) PWM generators and timers(LPWMG0/LPWMG1/LPWMG2)

 One hardware comparator

 6 IO pins with optional pull-high/pull-low resistor

 Bandgap circuit to provide 1.2V Bandgap voltage

 Clock sources: internal high RC oscillator and internal low RC oscillator

 14 Levels of LVR reset: 4.5V, 4.0V, 3.75V, 3.5V, 3.3V, 3.15V, 3.0V, 2.7V, 2.5V, 2.4V, 2.3V, 2.2V, 2.1V,2.0V

 Two selectable external interrupt pins

 Internal LDO to prevent touch noise

 Support low-power wake-up ‘stopsys’ by NILRC

1.3. CPU Features

 Operating modes: One processing unit mode

 82 powerful instructions

 Most instructions are 1T execution cycle

 Programmable stack pointer to provide adjustable stack level (Using 2 bytes SRAM for one stack level)

 Direct and indirect addressing modes for data and instructions

 All data memories are available for use as an index pointer

 Separated IO and memory space

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