Product Descriptions

RK3188 is a low power, high performance processor for mobile phones, personal mobile internet device and other digital multimedia applications, and integrates quad-core Cortex-A9 with separately NEON and FPU coprocessor. 

Many embedded powerful hardware engines provide optimized performance for high-end application. RK3188 supports almost full-format video decoder by 1080p@60fps, also support H.264/MVC/VP8 encoder by 1080p@30fps, high-quality JPEG encoder/decoder, and 

special image preprocessor and postprocessor.

Embedded 3D GPU makes RK3188 completely compatible with OpenGL ES2.0 and 1.1, OpenVG1.1. Special 2D hardware engine with MMU will maximize display performance and provide very smoothly operation.

RK3188 has high-performance external memory interface (DDR3/LPDDR2/LVDDR3) capable of sustaining demanding memory bandwidths, also provides a complete set of peripheral interface to support very flexible applications.

Product Features

The features listed below which may or may not be present in actual product, may be subject  to the third party licensing requirements. Please contact Rockchip for actual product feature  configurations and licensing requirements.

1.2.1 Processor

•  Quad-core ARM Cortex-A9 MPCore processor, a high-performance, low-power and cached application processor

•  Full implementation of the ARM architecture v7-A instruction set, ARM Neon Advanced SIMD (single instruction, multiple data) support for accelerated media and signal processing computation

•  Superscalar, variable length, out-of-order pipeline with dynamic branch prediction, 8-stage pipeline 

•  Include VFPv3 hardware to support single and double-precision add, subtract, divide, multiply and accumulate, and square root operations

•  SCU ensures memory coherency between the four CPUs

•  Integrated timer and watchdog timer per CPU

•  Integrated 32KB L1 instruction cache , 32KB L1 data cache with 4-way set associative

•  512KB unified L2 Cache

•  Trustzone technology support

•  Full core sight debug solution

•  Debug and trace visibility of whole systems

•  ETM trace support

•  Invasive and non-invasive debug

•  Six separate power domains for every core to support internal power switch and externally turn on/off based on different application scenario

•  PD_A9_0: 1st Cortex-A9 + Neon + FPU + L1 I/D Cache

•  PD_A9_1: 2nd Cortex-A9 + Neon + FPU + L1 I/D Cache

•  PD_A9_2: 3rd Cortex-A9 + Neon + FPU + L1 I/D Cache

•  PD_A9_3: 4th Cortex-A9 + Neon + FPU + L1 I/D Cache

•  PD_DBG: Core Sight-DK for Cortex-A9

•  PD_SCU: SCU + L2 Cache controller + L2 Dataram, and including PD_A9_0, PD_A9_1, PD_A9_2, PD_A9_3, PD_DGB

•  One isolated voltage domain to support DVFS

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