Product Descriptions

The AT45DB161D is a 2.5V or 2.7V, serial-interface sequential access Flash memory ideally suited for a wide variety of digital voice-, image-, program code- and data-storage applications. The AT45DB161D supports RapidS serial interface for applications requiring very high speed operations. RapidS serial interface is SPI compatible for frequencies up to 66MHz. Its 17,301,504-bits of memory are organized as 4,096 pages of 512-bytes or 528-bytes each. In addition to the main memory, the AT45DB161D also contains two SRAM buffers of 512-/528-bytes each. The buffers allow the receiving of data while a page in the main Memory is being reprogrammed, as well as writing a continuous data stream. EEPROM emulation (bit or byte alterability) is easily handled with a self-contained three step read-modify-write operation. Unlike conventional Flash memories that are accessed randomly with multiple address lines and a parallel interface, the Adesto DataFlash® uses a RapidS serial interface to sequentially access its data. The simple sequential access dramatically reduces active pin count, facilitates hardware layout, increases system reliability, minimizes switching noise, and reduces package size. The device is optimized for use in many commercial and industrial applications where high-density, low-pin count, low-voltage and low-power are essential.

To allow for simple in-system reprogrammability, the AT45DB161D does not require high input voltages for programming. The device operates from a single power supply, 2.5V to 3.6V or 2.7V to 3.6V, for both the program and read operations. The AT45DB161D is enabled through the chip select pin (CS) and accessed via a three-wire interface consisting of the Serial Input (SI), Serial Output (SO), and the Serial Clock (SCK).

All programming and erase cycles are self-timed.

Product Features

• Single 2.5V - 3.6V or 2.7V - 3.6V Supply

• RapidS™ Serial Interface: 66MHz Maximum Clock Frequency

– SPI Compatible Modes 0 and 3

• User Configurable Page Size

– 512-Bytes per Page

– 528-Bytes per Page

– Page Size Can Be Factory Pre-configured for 512-Bytes

• Page Program Operation

– Intelligent Programming Operation

– 4,096 Pages (512-/528-Bytes/Page) Main Memory

• Flexible Erase Options

– Page Erase (512-Bytes)

– Block Erase (4-Kbytes)

– Sector Erase (128-Kbytes)

– Chip Erase (16-Mbits)

• Two SRAM Data Buffers (512-/528-Bytes)

– Allows Receiving of Data while Reprogramming the Flash Array

• Continuous Read Capability through Entire Array

– Ideal for Code Shadowing Applications

• Low-power Dissipation

– 7mA Active Read Current Typical

– 25µA Standby Current Typical

– 15µA Deep Power Down Typical

• Hardware and Software Data Protection Features

– Individual Sector

• Sector Lockdown for Secure Code and Data Storage

– Individual Sector

• Security: 128-byte Security Register

– 64-byte User Programmable Space

– Unique 64-byte Device Identifier

• JEDEC Standard Manufacturer and Device ID Read

• 100,000 Program/Erase Cycles Per Page Minimum

• Data Retention – 20 Years

• Industrial Temperature Range

• Green (Pb/Halide-free/RoHS Compliant) Packaging Options

Product Specification

Product Photos

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