Product Descriptions

The AD97731 is the 12-bit member of the AD977x pincompatible, high performance, programmable 2×/4×/8× interpolating TxDAC+® family. The AD977x family features a serial port interface (SPI) that provides a high level of programmability, thus allowing for enhanced system-level options. These options include selectable 2×/4×/8× interpolation filters; fS/2, fS/4, or fS/8 digital quadrature modulation with image rejection; a direct IF mode; programmable channel gain and offset control; programmable internal clock divider; straight binary or twos complement data interface; and a singleport or dual-port data interface.

The selectable 2×/4×/8× interpolation filters simplify the requirements of the reconstruction filters while simultaneously enhancing the TxDAC+ family’s pass-band noise/distortion performance. The independent channel gain and offset adjust registers allow the user to calibrate LO feedthrough and sideband suppression errors associated with analog quadrature modulators. The 6 dB of gain adjustment range can also be used to control the output power level of each DAC.

The AD9773 features the ability to perform fS/2, fS/4, and fS/8 digital modulation and image rejection when combined with an analog quadrature modulator. In this mode, the AD9773 accepts I and Q complex data (representing a single or multicarrier waveform), generates a quadrature modulated IF signal along with its orthogonal representation via its dual DACs, and presents these two reconstructed orthogonal IF carriers to an analog quadrature modulator to complete the image rejection upconversion process. Another digital modulation mode (for example, the direct IF mode) allows the original baseband signal representation to be frequency translated such that pairs of images fall at multiples of one-half the DAC update rate.

Product Features

12-bit resolution, 160 MSPS/400 MSPS

input/output data rate

Selectable 2×/4×/8× interpolating filter

Programmable channel gain and offset adjustment

fS/2, fS/4, fS/8 digital quadrature modulation capability

Direct IF transmission mode for 70 MHz + IFs

Enables image rejection architecture

Fully compatible SPI port

Excellent ac performance

SFDR −69 dBc @ 2 MHz to 35 MHz

WCDMA ACPR −69 dB @ IF = 19.2 MHz

Internal PLL clock multiplier

Selectable internal clock divider

Versatile clock input

Differential/single-ended sine wave or

TTL/CMOS/LVPECL compatible

Versatile input data interface

Twos complement/straight binary data coding

Dual-port or single-port interleaved input data

Single 3.3 V supply operation

Power dissipation: typical 1.2 W @ 3.3 V

On-chip 1.2 V reference

80-lead thin quad flat package, exposed pad (TQFP_EP) 

Product Applications

Communications

Analog quadrature modulation architecture

3G, multicarrier GSM, TDMA, CDMA systems

Broadband wireless, point-to-point microwave radios

Instrumentation/ATE 

Product Specification

Product Photos

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